← SEARCHABLE ARCHIVE
Nand2Tetris · 2026-05-17

Nand2Tetris — 第 3 章

顺序逻辑和记忆

INTERACTIVE READING MODE →

//1位寄存器[引用:2]
//输入:输入,负载(1 位)[引用:3]
//输出:out(1 位)[引用:4]
//操作:如果负载为 1(有效),则寄存器的值将设置为 [cite:2] 中的值。
//否则寄存器保留其当前值(如果 load(t) out(t+1) = in(t),否则 out(t+1) = out(t))[引用:3]。

CHIP Bit {
    IN in, load;
    OUT out;

    PARTS:
    Mux(a=DFFO , b=in , sel=load , out=MuxO );
    DFF(in=MuxO , out=DFFO, out=out );
}
//16位程序计数器
//输入:in[16]、加载、inc、重置[引用:5]
//输出:out[16] [引用:5]
//操作:根据复位、加载和inc信号的优先级确定下一个时钟周期的寄存器值[引用:6]。

CHIP PC {
    IN in[16], load, inc, reset;
    OUT out[16];

    PARTS:
    Inc16(in=regOut, out=incOut);
    Mux16(a=regOut, b=incOut, sel=inc, out=mux1);

    Mux16(a=mux1, b=in, sel=load, out=mux2);

    Mux16(a=mux2, b=false, sel=reset, out=mux3);

    Register(in=mux3, load=true, out=regOut, out=out);
}
//16位寄存器[引用:34]
//输入:in[16],加载[引用:35]
//输出:out[16] [引用:36]
//操作:如果负载为 1(有效),则寄存器的值将设置为 [cite: 34] 中的值。
//否则,保持当前值[引用:35]。 16 位芯片并联[引用:36、37、38、39、40、41]。

CHIP Register {
    IN in[16], load;
    OUT out[16];

    PARTS:
    Bit(in=in[0] , load=load , out=out[0] );
    Bit(in=in[1] , load=load , out=out[1] );
    Bit(in=in[2] , load=load , out=out[2] );
    Bit(in=in[3] , load=load , out=out[3] );
    Bit(in=in[4] , load=load , out=out[4] );
    Bit(in=in[5] , load=load , out=out[5] );
    Bit(in=in[6] , load=load , out=out[6] );
    Bit(in=in[7] , load=load , out=out[7] );
    Bit(in=in[8] , load=load , out=out[8] );
    Bit(in=in[9] , load=load , out=out[9] );
    Bit(in=in[10] , load=load , out=out[10] );
    Bit(in=in[11] , load=load , out=out[11] );
    Bit(in=in[12] , load=load , out=out[12] );
    Bit(in=in[13] , load=load , out=out[13] );
    Bit(in=in[14] , load=load , out=out[14] );
    Bit(in=in[15] , load=load , out=out[15] );
}
//八个 16 位寄存器的内存 [cite: 12]
//输入:in[16],负载,地址[3] [引用:15]
//输出:out[16] [引用:15]
//操作:如果加载为 1,则将地址选择的寄存器的值设置为[cite:13]中的值。
//否则,该值不会改变,并且所选寄存器的值将被发送到 out [cite: 14]。

CHIP RAM8 {
    IN in[16], load, address[3];
    OUT out[16];
    PARTS:
    DMux8Way(in=load, sel= address,
    a= Out0, b= Out1,
    c= Out2, d= Out3,
    e= Out4, f= Out5,
    g= Out6, h= Out7);
    Register(in=in , load=Out0 , out=R0 );
    Register(in=in , load=Out1 , out=R1 );
    Register(in=in , load=Out2 , out=R2 );
    Register(in=in , load=Out3 , out=R3 );
    Register(in=in , load=Out4 , out=R4 );
    Register(in=in , load=Out5 , out=R5 );
    Register(in=in , load=Out6 , out=R6 );
    Register(in=in , load=Out7 , out=R7 );
    Mux8Way16(
    a= R0, b= R1,
    c= R2, d= R3,
    e= R4, f= R5,
    g= R6, h= R7,
    sel= address, out=out);
}
//64个单词记忆
//输入:in[16],负载,地址[6] [引用:25]
//输出:out[16] [引用:25]
//操作:将8个RAM8芯片组合成64个寄存器[引用:26,27,28]。

CHIP RAM64 {
    IN in[16], load, address[6];
    OUT out[16];
    PARTS:
    DMux8Way(in=load, sel=address[3..5], a=loadA, b=loadB, c=loadC, d=loadD, e=loadE, f=loadF, g=loadG, h=loadH);

    RAM8(in=in, load=loadA, address=address[0..2], out=outA);
    RAM8(in=in, load=loadB, address=address[0..2], out=outB);
    RAM8(in=in, load=loadC, address=address[0..2], out=outC);
    RAM8(in=in, load=loadD, address=address[0..2], out=outD);
    RAM8(in=in, load=loadE, address=address[0..2], out=outE);
    RAM8(in=in, load=loadF, address=address[0..2], out=outF);
    RAM8(in=in, load=loadG, address=address[0..2], out=outG);
    RAM8(in=in, load=loadH, address=address[0..2], out=outH);

    Mux8Way16(a=outA, b=outB, c=outC, d=outD, e=outE, f=outF, g=outG, h=outH, sel=address[3..5], out=out);
}
//512个单词记忆
//输入:in[16],负载,地址[9] [引用:29]
//输出:out[16] [引用:29]
//操作:8个RAM64芯片组合起来形成512个寄存器[引用:30,31,32]。

CHIP RAM512 {
    IN in[16], load, address[9];
    OUT out[16];
    PARTS:
    DMux8Way(in=load, sel=address[6..8], a=loadA, b=loadB, c=loadC, d=loadD, e=loadE, f=loadF, g=loadG, h=loadH);

    RAM64(in=in, load=loadA, address=address[0..5], out=outA);
    RAM64(in=in, load=loadB, address=address[0..5], out=outB);
    RAM64(in=in, load=loadC, address=address[0..5], out=outC);
    RAM64(in=in, load=loadD, address=address[0..5], out=outD);
    RAM64(in=in, load=loadE, address=address[0..5], out=outE);
    RAM64(in=in, load=loadF, address=address[0..5], out=outF);
    RAM64(in=in, load=loadG, address=address[0..5], out=outG);
    RAM64(in=in, load=loadH, address=address[0..5], out=outH);

    Mux8Way16(a=outA, b=outB, c=outC, d=outD, e=outE, f=outF, g=outG, h=outH, sel=address[6..8], out=out);
}
//4K字记忆
//输入:in[16],负载,地址[12] [引用:7]
//输出:out[16] [引用:7]
//操作:8个RAM512芯片组合起来形成4096个寄存器[引用:8、9、10]。

CHIP RAM4K {
    IN in[16], load, address[12];
    OUT out[16];
    PARTS:
    DMux8Way(in=load, sel=address[9..11], a=loadA, b=loadB, c=loadC, d=loadD, e=loadE, f=loadF, g=loadG, h=loadH);

    RAM512(in=in, load=loadA, address=address[0..8], out=outA);
    RAM512(in=in, load=loadB, address=address[0..8], out=outB);
    RAM512(in=in, load=loadC, address=address[0..8], out=outC);
    RAM512(in=in, load=loadD, address=address[0..8], out=outD);
    RAM512(in=in, load=loadE, address=address[0..8], out=outE);
    RAM512(in=in, load=loadF, address=address[0..8], out=outF);
    RAM512(in=in, load=loadG, address=address[0..8], out=outG);
    RAM512(in=in, load=loadH, address=address[0..8], out=outH);

    Mux8Way16(a=outA, b=outB, c=outC, d=outD, e=outE, f=outF, g=outG, h=outH, sel=address[9..11], out=out);
}
//16K字存储器
//输入:in[16],负载,地址[14] [引用:22]
//输出:out[16] [引用:22]
//操作:四个RAM4K芯片与DMux4Way和Mux4Way16结合配置16384个寄存器[引用:23, 24]。

CHIP RAM16K {
    IN in[16], load, address[14];
    OUT out[16];
    PARTS:
    DMux4Way(in=load, sel=address[12..13], a=loadA, b=loadB, c=loadC, d=loadD);

    RAM4K(in=in, load=loadA, address=address[0..11], out=outA);
    RAM4K(in=in, load=loadB, address=address[0..11], out=outB);
    RAM4K(in=in, load=loadC, address=address[0..11], out=outC);
    RAM4K(in=in, load=loadD, address=address[0..11], out=outD);

    Mux4Way16(a=outA, b=outB, c=outC, d=outD, sel=address[12..13], out=out);
}